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FU6333N

Product Overview

The high-performance motor drive chip incorporates ME core and 8051 core. ME core integrates FOC, MDU, LPF, PID and SVPWM modules that allow for automatic calculation of FOC or square-wave control by the hardware for sensored/sensorless BLDC/PMSM motors. 8051 core is used for parameter configuration and routine processing. Most of 8051 core instruction cycle takes 1T or 2T clock cycle(s). The dual cores work in parallel to achieve high-performance motor control. Moreover, the MR sensor adopts AMR (anisotropic magnetoresistance) technology, which brings more benefits than those Hall-based magnetic sensors. Also, the chip integrates high-speed operational amplifiers, comparators, pre-driver, high-speed ADC, CRC, SPI, I2C, UART, Timers and built-in high-voltage LDO, which are suitable for FOC or square-wave based BLDC/PMSM motors.

FU6333N
Feature
  • Power supply:
  • Single-power supply mode: When VCC_MODE = 0, external power supply 5V ~ 28V is connected to VCC pin, and internal LDO supplies VDD5 voltage.
  • Low-voltage single-power supply mode: When VCC_MODE = 1, external power supply 3V ~ 5.5V is connected to VDD5 pin, and VDD5 pin is shorted to VCC pin.
  • Dual-power supply mode: When VCC_MODE = 1, external power supply 1 (5V ~ 36V) is connected to VCC pin, and external power supply 2 (5V) is connected to VDD5 pin.
  • Dual core: 8051 core and ME core
  • 180° MR sensor to sense magnetic field on X-Y plane
  • An instruction cycle mostly takes 1 or 2 system clock cycle(s)
  • 16kB Flash ROM with CRC, self-program and code protection
  • 256 bytes IRAM and 768 bytes XRAM
  • ME: Core integrating PID module, FOC module, MDU auxiliary computing module and LPF module
  • 1T 16x16 multiplier, 16T 32/16 divider
  • 16 interrupt sources with 4 configurable priority levels
  • 22*GPIOs
  • Timers:
  • Timer1: Timer supporting square-wave drive timing control, automatic commutation and cycle-by-cycle current limiting;
  • Timer2: Timer supporting PWM output, cycle measurement of input PWM wave, measurement of the number of input PWM waves and tailwind/headwind detection (RSD);
  • Timer3/Timer4: Timers supporting PWM output and cycle measurement of input PWM wave. Timer4 supports FG generation and Timer3 supports up to 48MHz input.
  • Systick Timer
  • RTC
  • Communication interfaces:
  • 1*SPI
  • 1*I2C
  • 2*UARTs, supporting single-wire mode
  • Dual-channel DMA: supporting data transmission via I2C/SPI/UART
  • Analog peripherals:
  • 12-bit ADC, operating with 1μs conversion time and internal VREF or external VREF as reference voltage
  • 8*ADC channels
  • Internal VREF. 3V, 4V, 4.5V or VDD5 can be selected as the internal reference
  • Internal VHALF (VREF/2) as the internal reference
  • 3 standalone operational amplifiers, where the gain of AMP0 is configurable
  • 3-channel analog comparator (CMPG0 intended for internal use)
  • DAC: Single-channel 9-bit (built-in DAC0), single-channel 6-bit
  • Built-in MOSFET driver: 3P3N pre-driver output
  • Automatic commutation, cycle-by-cycle current limiting and Hall/BEMF-based position sensing for BLDC motor control
  • FOC module supports single/dual/triple-shunt current sampling
  • FOC module supports overmodulation
  • System Clock
  • Built-in 24MHz high-speed RC oscillator
  • Built-in 32.8kHz low-speed RC oscillator
  • WDT
  • LVD
  • TSD
  • Two-wire FICE protocol based in-circuit emulation
Technical Advantages
FU6333N
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Document Type Title Version Date
Datasheet V1.0 20250217
Datasheet
MCU-DS-37_FU6333N
  1. PDF
  2. Chinese
V1.1 20250728
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Hardware
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· Chip Model
Title Description Date Download
FU-AM-FU6333N-B-000-HW-V1.0-20220706 2022-07-06 Download
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