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FS9660

Product Overview

FS9660AH is a fully-integrated IPM with motor controller, driver and power IC. Its high-performance motor drive chip incorporates ME core and 8051 core. ME core integrates FOC, MDU, LPF, PID and SVPWM modules that allow for automatic calculation of FOC or square-wave control by the hardware for sensored/sensorless BLDC/PMSM motors. 8051 core is used for parameter configuration and routine processing. Most of 8051 core instruction cycle takes 1T or 2T clock cycle(s). The dual cores work in parallel to achieve high-performance motor control. The chip integrates high-speed operational amplifiers, comparators, high-speed ADC, CRC, I2C, UART, Timers and built-in high-voltage LDO module, which are suitable for FOC or square-wave based BLDC/PMSM motors.

FS9660AH
Feature
  • VCC power supply: External power supply 5V ~ 28V is connected to VCC pin, and internal LDO supplies VDD5 voltage.
  • MOSFET:
  • P-Channel:
  • VDS = -40V
  • ID = -6A
  • RDS = 12mΩ
  • N-Channel:
  • VDS = 40V
  • ID = 6A
  • RDS = 9.2mΩ
  • Dual core: 8051 core and ME core
  • An instruction cycle mostly takes 1 or 2 system clock cycle(s)
  • 16kB Flash ROM with CRC, self-program and code protection
  • 256 bytes IRAM and 768 bytes XRAM
  • ME: Core integrating PID/FOC/LPF modules and MDU auxiliary computing module
  • 16 interrupt sources with 4 configurable priority levels
  • Number of GPIOs: 25
  • Timers:
  • Timer1: Timer supporting square-wave drive timing control, automatic commutation, cycle-by-cycle current limiting and Hall/BEMF-based position sensing;
  • Timer2: Timer supporting PWM output, measurement of duty cycle and period of input PWM wave, measurement of the time of set PWM wave numbers, QEP decoding, tailwind/headwind detection (RSD), and rotation direction and speed detection of step motor;
  • Timer3/Timer4: Timers supporting PWM output, and measurement of duty cycle and period of input PWM wave. Timer4 supports FG generation and Timer3 supports up to 48MHz input.
  • Systick Timer
  • RTC
  • Communication interfaces:
  • 1*I2C
  • 2*UARTs, supporting single-wire mode
  • Dual-channel DMA: supporting data transmission via I2C/UART
  • Analog peripherals:
  • 12-bit ADC, operating with 1μs conversion time and internal VREF or external VREF selectable as reference voltage
  • Number of ADC channels: 12
  • Internal VREF (VDD5) as the internal reference
  • Internal VHALF (VREF/2) as the internal reference
  • 3 standalone operational amplifiers, where AMP0 is the programmable-gain amplifier
  • 3-channel analog comparator
  • DAC: Single-channel 9-bit, single-channel 6-bit
  • FOC module supports single/dual/triple-shunt current sampling
  • System clock:
  • Built-in 24MHz high-speed RC oscillator
  • Built-in 32.8kHz low-speed RC oscillator
  • WDT
  • LVD
  • TSD
  • Two-wire FICE protocol based in-circuit emulation
Technical Advantages
FS9660AH
Applications
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· Document Type
Document Type Title Version Date
Datasheet V1.0 20250307
Datasheet
IPM-DS-13_FS9660AH
  1. PDF
  2. Chinese
V1.1 20251017
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Hardware
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· Chip Model
Title Description Date Download
IPM-AM-FS9660AH-B-000-HW-V1.0-20220927 20220927 Download
Software
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