Power supply of FU6863Q:
Mode 1: VCC_MODE = 0 and VCC = 5V ~24V
Mode 2: VCC_MODE = 1, VCC = 5V ~ 24V and VDD5 = 3V ~ 5.5V
Dual core: 8051 core and ME core
An instruction cycle mostly takes 1 or 2 system clock cycle(s)
32KB Flash ROM with CRC, self-program and code protection
256 bytes IRAM and 1.5K bytes XRAM
ME: Core integrating LPF module, PI regulator, BLDC module and FOC module
1T 16x16 multiplier, 16T 32/16 divider
15 interrupt sources with 4 configurable priority levels
Number of GPIOs:
FU6813L: 34
FU6813N: 20
FU6813P: 35
FU6863Q: 32
Timers:
2*Programmable timers with capture feature
1*QEP decoding programmable timer
1*General-purpose timer
1*RTC
1*SPI
1*I2C
2*UARTs
Dual-channel DMA: supporting data transmission via I2C/SPI/UART
Analog Peripherals:
12-bit ADC, operating with 1μs conversion time and internal VREF or external VREF selectable as reference voltage
Number of ADC channels:
- FU6863Q: 14
Internal VREF. 3V, 4V, 4.5V and VDD5 can be selected as the internal reference
Internal VHALF, with 1/2 VREF as the internal reference
4*Standalone operational amplifiers
4-channel analog comparator
DAC: Single-channel 9-bit, single-channel 8-bit, single-channel 6-bit
Driver type:
FU6863: 6N Pre-driver
Automatic commutation, cycle-by-cycle current limiting and Hall/BEMF-based position sensing for BLDC motor control
FOC module supports single/dual/triple-shunt current sampling
FOC module supports overmodulation
PFC
System clock
Built-in 24MHz ± 2% high-speed clock
32.8kHz low-speed clock
32768Hz crystal clock
WDT
Two-wire FICE protocol based in-circuit emulation
FU6863Q
