FS9650

Feature

• Power supply:
• External power supply 5V ~ 28V is connected to VCC pin, and internal LDO supplies VDD5 voltage
• MOSFET:
• P-Channel:
• V_DS = - 40V
• I_D = - 5A
• R_DS = 25mΩ
• N-Channel:
• V_DS = 40V
• I_D = 5A
• R_DS = 15mΩ
• Dual-core: 8051 and ME core
• An instruction cycle mostly takes 1 or 2 system clock cycle(s)
• 16kB Flash ROM, CRC, self-programming, and code protection
• 256 bytes IRAM and 768 bytes XRAM
• ME: Core integrating PID module, FOC module, MDU auxiliary computing module and LPF module
• 16 interrupt sources with 4 configurable priority levels
• GPIO: 25 GPIOs
• Timers:
• Timer1: Timer supporting square wave drive timing control, automatic commutation, cycle-by-cycle current limiting and Hall/BEMF-based position sensing;
• Timer2: Timer supporting PWM output, measurement of duty cycle and period of input PWM wave, measurement of the time of set PWM wave numbers, QEP decoding, tailwind/headwind detection (RSD), rotation direction and speed detection of step motor
• Timer3/Timer4: Timers supporting PWM output, and measurement of duty cycle and period of input PWM wave. Timer4 supports FG generation and Timer3 supports up to 48MHz input.
• Systick timer
• RTC
• Communication interfaces:
• 1*I²C
• 2*UARTs, supporting single-wire mode
• Dual-channel DMA: Support data transmission via I²C/UART
• Analog peripherals:
• 12-bit ADC: 1μs conversion time with internal VREF or external VREF as reference voltage
• Number of ADC channels: 12
• Built-in VREF: VDD5
• Built-in VHALF (VREF/2)
• 3 standalone operational amplifiers, where AMP0 can be configured as PGA
• 3-channel analog comparators
• DAC: Single-channel 9-bit, single0channel 6-bit
• FOC module supports single/dual/triple-shunt current sampling
• Oscillator:
• Built-in 24MHz high-speed RC oscillator
• Built-in 32.8kHz low-speed RC oscillator
• WDT
• LVD
• TSD
• Two-wire FICE protocol based in-circuit emulation